Have the engine always used SSE2?

[sago007]

Yesterday I worked on creating an automatic build of the Windows version.
Apart from libcurl and libxmp I got the version compiled with a MXE installation.

However there was one thing that hit me.
I had to add the following flags:

Code:

BASE_CFLAGS += -mmmx -msse2

Otherwise errors from the inline assembly:

Code:

LD build/release-mingw32-x86/oa_ded.x86.exe
code/asm/ftola.c: In function 'qvmftolsse':
code/asm/ftola.c:49:3: error: unknown register name '%xmm0' in 'asm'
   __asm__ volatile
   ^
code/asm/snapvector.c: In function 'qsnapvectorsse':
code/asm/snapvector.c:38:2: error: unknown register name '%xmm2' in 'asm'
  __asm__ volatile
  ^
code/asm/snapvector.c:38:2: error: unknown register name '%xmm1' in 'asm'
code/asm/snapvector.c:38:2: error: unknown register name '%xmm0' in 'asm'
lto-wrapper: i686-w64-mingw32.static-gcc returned 1 exit status

The code in question seems to be original idtech3 code.
I wonder why I never had this problem before...

Anybody knows?

[fromhell]

The original engine does use SSE/SIMD but in a non-restrictive way that doesn't leave out non-SSE targets.  I can still run the latest OA SDL1 engine build on a non-MMX, non-SSE Pentium target

However the (engine-master) makefile does need sse2 exposed to the inline assembler, which is why it specifies the AMD64 architecture (the first on the AMD side to feature SSE2)

Code:

# k8 so inline assembler knows about SSE
$(B)/ded/%.o: $(ASMDIR)/%.c
$(DO_CC) -march=k8